Introduction
Chips are nowadays found in almost every electronic equipment, system, or application. The semiconductors market has taken the lead in the world economy and most of the countries that seek to have technological independence are focusing on their development. No doubt that technology is growing far and wide hence the use of semiconductors is not coming to an end shortly. Currently, it is possible to incorporate thousands of transistors and other virtual components in one chip.
As these chips form truly integrated systems, they are thus called systems on a chip. The performance of these systems is relatively high with low power consumption. Technology advancement has made it possible for developers to integrate assorted components of the same substrate in one chip. The reusable components are usually called intellectual property blocks and are often referred to as soft cores. The issue of reuse can start at the block, chips level, or platform and entails ensuring that the intellectual property is completely general, configurable, and programmable for it to be used in an extensive variety of processes. This has resulted in the chips being too complex.
Intellectual property integration involves connecting the computational parts to the medium of communication. The methods of testing the system are also defined together with verification issues that are encountered when integrating reusable components.
Design teams have adopted a block-based design approach that emphasizes design reuse. However, as a result of changing to this approach, the teams have plunged into many challenges. Sometimes they have used components that are not designed for reuse thus ending up not having achieved their objective. The team has realized that for the design reuse to succeed, they must have a clear method of developing macros that are easily integrated into the system-on-chip.
Deep submicron technology makes it possible for SoCs to be developed with the required features. It helps in the whole set of design which includes timer and power circulation, interconnection delays, allocation, and routing of millions of gates. For the macros to be reused, they must be exceptionally easy to integrate into the chip design. They must also be so robust that there is no need of verifying their functionality after development.
Therefore there must be proper documentation, good coding, and systematic commenting about the macros. As a result, the designers are coming up with macros that are easily configurable for different applications. The macros are also designed with standard interfaces for them to be used with any application. They are also designed in a way that it is possible to verify them in any chip (Keating & Bricaud pp.1-6).
Properties of the system on chip
The system-on-chip consists of one microcontroller or microprocessor core, memory blocks which are a selection of read-only memory (ROM), random access memory (RAM), and flash. They also consist of phase-locked loops and oscillators which work as timing apparatus. Some of the peripheral devices include counter-timers and power-on reset generators. They support connection to other external interfaces such as the Ethernet and FireWire. Apart from all the above hardware devices, system-on-chip contains software that controls the microprocessor, peripherals, and interfaces (White par. 1, 2 &3).
To develop a system on a chip, companies need to consider both the core reuse and the system-on-chip integration architecture. The designers should learn to approach the designing problem from the system downwards to the core level instead of the upward approach. One of the challenges in construction is incorporating intellectual property to allow broad reuse. To solve this problem, there is a need for a complete intellectual property core interface comprising of data, control, and test. This will allow cores to be independently created, tested, and integrated as components to the system not attached to the system-on-chip interconnect.
Until such a system is developed, there will be no breakthrough in the system on chip development. For this technology to be conceptualized, there is a need for all the stakeholders in design to collaborate without undermining each other’s roles (Pierce par. 1, 3, &5).
The integrated circuits of the system on the chip consist of various reusable well-designed blocks, such as memory arrays, digital signal processors, and microprocessors. These blocks are called cores and are usually designed in advance before they are integrated into the circuit. SoC integrates various properties in one chip device thus providing a wide range of capabilities under a single component. It may contain a combination of cores providing different services such as microprocessors, audio and video controllers, modems, to mention but a few. Most of the peripheral devices that used to be implemented in separate circuits in the traditional models of processors have been integrated into one block in the system-on-chip. Field-programmable gate array (FPGA) based system on chip has also been developed as a result of advancement in FPGA technology.
FPGA consists of several programmable elements, electronic circuits, and routing infrastructure. It can be programmed to selectively interconnect the processors as well as define the functions of these processors. The SoC also contains internal memory that stores information such as the instructions for the modules and data. As more tasks are being performed using computers, the available space in computer chips is shrinking leading to high demand for functionality in less physical space. This has led to the manufacturers coming up with systems-on-chip to meet this demand. The benefits of the system on chip speak for themselves as everything required for a computer to run is integrated into one chip. The system on chip is unique in that it is both software and hardware. The drawbacks of it are, however, time and money.
Advantages of the system on chip
A system on a chip provides many benefits to users over traditional systems. Integrating all components in one chip leads to a reduction in the size of the product hence making them easily portable. It also enhances the processing speed of the system and its reliability. The separate integrated circuit is usually comprised of components that are connected on a printed circuit board while the system on chip is designed such that the entire system is implemented on a single chip making the products smaller in size, faster, and more efficient. The system on chip has faster chip speed as a result of the components being integrated into one chip. By integrating all the chips’ functions under one device, one is saved the task of having to physically move data from one chip to another thus enhancing speed.
Since the system on the chip allows integration of all components of systems whether complex such as cell phones and television receivers, it leads to the reduction in the size of the products. Consequently, the power consumption of the devices is greatly reduced as well as the production cost. A circuit operation that takes place under an integrated circuit requires less power than that required by a similar circuit on a printed circuit board with distinct components (System on chip (SOC) par.1, 2 &3).
System on chip helps in achieving better and increased functionalities. This is because the required logic can be stored in a chip. The cost of having to incorporate other circuit components is thus reduced to ensure that the chip is capable of storing all the required data for the process to be performed completely and successfully. The designers are therefore left with the task of developing a versatile chip that will be able to accommodate all the functionalities of the individual component used in the system implemented on printed circuit boards.
Also, the hardware is easily reconfigured to meet the required functionality as per the new protocols. System on chip supports reuse of reconfigurable chips which has many advantages and applications. Systems on chip implemented in field-programmable gate arrays that have partially failed are easily reconfigurable to steer clear of the damaged parts and continue with the original operations though at a reduced performance. Also, it is possible to implement identical SoCs in one system hence enhancing reliability through redundancy.
System on chip supports parallel processing of operations hence saving on time. It’s possible to configure the various modules stored in one chip in a way that they can run parallel. The embedded characteristic of the system on the chip makes it possible to reconfigure the system to execute multiple functions at the same time. This has also helped in different applications sharing the same resources to perform varied tasks at different times without having to provide resources for each application. Due to the system on chip reconfigurable nature, it is possible to quickly modify it from a remote location to improve its performance. Its ability to be reconfigured to perform a completely different task makes it less costly compared to the traditional application-specific integrated circuits (ASIC).
As the system on chip eliminates the ASIC design, the cost of its development is reduced. Its reconfigurable nature further reduces cost since it can be reconfigured to meet the dynamic specifications of applications without having to buy another system. This allows for them to be upgraded hence extending their useful time and consequently reducing their lifetime cost. For the case of ASCI and general-purpose hardware designs, if their technology turns obsolete, it requires one to purchase new technology hence making them more expensive.
System on a chip has reduced time to market. With the obsolescence of application-specific integrated circuits, the development effort of the system on chip has been reduced such that it is possible to upgrade the system even after it has already been introduced to the market. The design can be sent to the market with minimum specifications and the subsequent upgrading done later without changing the system or the devices. This has led to the system on the chip being used to run most of the applications.
Disadvantages of the system on chip
System on a chip has been attributed to various disadvantages such as; chips take time in reconfiguring to a given task and the difficulty experienced in attempting to come up with such chips. It cost a lot of time and money to develop one system on a chip than it takes to develop the traditional chips. This is because the materials needed for its manufacture are still new and unfamiliar to the manufacturers. This is however changing gradually as the chip manufacturers continue discovering the usefulness of the system on chip and its potential. The laws of physics also remain to be the main obstacle to the final version of the system-on-chip.
The demand for chip and their silicon increases as one combines the hardware and the software. The demands may even become overwhelming for technology to manage them. This has to lead to the developers using alternative surface areas with different conductivity requirements from those of silicon. With the progress that these alternatives have made, there is hope for a system on the chip being developed shortly (White par.3&4).
As the system on the chip is highly integrated, it is hard to replace a particular device in case of failure. The entire system is overhauled and a new one is used on its behalf. This becomes costly in terms of money for coming up with a new system as well as time consumed during the system development. Some of the devices integrated into the system are also to understand their designs. This may lead to some of them not performing as per the organization’s expectations.
Complexities associated with the system on chip
The system on chip is associated with various complexities which comprise; design space, routing, timing, assignment, consistency, and development tools. If one requires reconfiguring new hardware, and ample space is required for keeping the hardware. This becomes complex for the system on chip especially if the hardware requires to be placed near resources such as built-in memories or input/output resources.
When reconfiguring or upgrading, the existing components have to be connected to the newly introduced devices. This asks for the provision of ports to help in interconnecting the components. It becomes a problem when the available ports turn out not to be enough or even when there are no extra ports to accommodate the new components. It is required that the newly configured equipment meet the timing requirement to harmonize the operations of the system. In an event where long cables are interconnecting the components, they may affect the timing hence compromising the processing speed of the system. Sometimes there might be under timing or over the timing of the added device leading to flawed results.
Reconfiguring the system on a chip might affect its computational consistency. When adding new components to the device, one should ensure that the existing design of the device is not tampered with or deleted. There are also no readily available materials for dynamically reconfigurable computing systems such as systems-on-chip. Most of the available materials are still under development process. This has made it hard to have these systems in full operation (ASIC-System On Chip (SoC)-VLSI Design par.1-11).
Conclusion
Despite the numerous challenges the field of the system on chip is facing, the technology will continue to grow. There has been a collaboration between universities and the industries that develop this system resulting in the emergence of research that will help in the development of a viable system-on-chip as well as cutting on the challenges that are currently facing this industry. With increasing market pressure, field-programmable gate arrays and other programmable logic devices will be integrated into the system on-chip. These will be a tremendous breakthrough in the communication industry as well as computer technology.
Works cited
“ASIC-System On Chip (SoC)-VLSI Design.” 2007. Web.
Keating, Michael & Bricaud, Pierre. Reuse Methodology Manual for System on a Chip Design. 3rd ed. Massachusetts: United States of America.2002.
Pierce, Grant. “System-on-chip design: Is it reuse or useless?”1999. Web.
“System on chip (SoC).”2007. Web.
White, David. “What is a System on a Chip (SOC)?” 2009. Web.